ASIC Application-Specific Integrated Circuit
ASP Addressable Scan Port
ATE Automatic Test Equipment
ATPG Automatic Test Pattern Generation
BIST Built-In Self-Test
B/S Boundary-Scan
BSC Boundary-Scan Cell
BSDL Boundary-Scan Description Language
BSR Boundary-Scan Register
BST Boundary-Scan Test
CAE Computer-Aided Engineering
DFT Design-for-Test
DR Data Register
DSP Digital Signal Processing/Processor
EDA Electronic Design Automation
eTBC Embedded Test Bus Controller
FPGA Field-Programmable Gate Array
HSDL Hierarchical Scan Description Language
ICE In-Circuit Emulation
ICT In-Circuit Test
IEEE Institute of Electrical & Electronics Engineers IR
Instruction Register
ISP In-System Programming
JTAG Joint Test Action Group
MCM Multi-Chip Module
Mfg Manufacturing
PCB Printed Circuit Board
PLD Programmable Logic Device
PRPG Pseudo-Random Pattern Generation
PSA Parallel Signature Analysis
PWB Printed Wiring Board
SPL Scan Path Linker
SVF Serial Vector Format
TAP Test Access Port
TBC Test Bus Controller
TCK Test Clock
TDI Test Data Input
TDO Test Data Output
TMS Test Mode Select
TRST Test Reset
UUT Unit Under Test
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